VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science - J Mermet - Bøger - Springer - 9780792392538 - 31. maj 1992
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VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science 1992 edition

J Mermet

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VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science 1992 edition

Presents recent research on four key issues related to the use of VHDL as a standard for hardware description: simulation of circuits using VHDL; the combination of synthesis and VHDL in designing circuits; the formal verification of VHDL designs; and modelling issues and system level design.

307 pages, biography

Medie Bøger     Hardcover bog   (Bog med hård ryg og stift omslag)
Udgivet 31. maj 1992
ISBN13 9780792392538
Forlag Springer
Antal sider 307
Mål 155 × 235 × 19 mm   ·   625 g
Klipper/redaktør Mermet, Jean

Se alt med J Mermet ( f.eks. Hardcover bog )